Developing Field Programmable Gate Array (FPGA) Digital Signal Processing Systems
(1.4 ceu)
This course provides introductory as well as state-of-the-art coverage on the design and implementation of FPGA signal processing systems. The emphasis is on the use of FPGAs for digital communications. The course presents a combination of signal processing theory, FPGA architecture, datapath design,
and design methodologies. Presented design techniques emphasize silicon efficient and high-performance FPGA implementations of the various signal processing topics addressed in the course. Material pertinent to engineers and scientists designing single-carrier and multi-carrier MIMO-OFDM
wireless communication systems is covered.
Topics include an overview of current generation FPGAs, digital filters, multirate filters, building transform processors, adaptive filters, adaptive channel equalizers, symbol timing recovery, carrier removal, DDC, DUC, CORDIC arithmetic, and MIMO-OFDM. The course also covers how to implement an FPGA DSP design using VHDL and visual programming methodologies such as Simulink. Price includes course notes.
Who Should Attend
Signal processing engineers and scientists planning on implementing signal processing systems using programmable logic, and logic/hardware engineers involved with the implementation of FPGA-based signal processing platforms. A basic understanding of signal processing theory and the fundamentals of digital filters is assumed. Some exposure to programmable logic, primarily FPGA technology, would be beneficial, but is not essential.
Topic Outline
Signal Processing Theory, Algorithms, and FPGA implementation of
- Multirate filters (polyphase decimators and interpolators)
- Adaptive systems and algorithms
- CORDIC processing techniques
- Wireless communication systems
Digital Communications
- Multi-carrier MIMO-OFDM Systems
- MIMO-OFDM basics
- FPGA architecture of a MIMO-OFDM transceiver
- Space-time block codes and spatial multiplexing MIMOs
- Prototyping on a real-time wireless testbeds
- Single Carrier Modulation
- Digital-down and up conversion
- QAM modulation and demodulation
- Channel equalizers
- Blind equalizers
- Digital phase-locked loops
- Timing recovery
- Carrier recovery
FPGAs
- State-of-the-art FPGA architecture
- When and why you use an FPGA for signal processing
- Designing FPGA datapaths
- Implementing FPGA systems
- FPGA DSP benchmarks
System Implementation and Verification
- Implementing efficient FPGA signal processing systems using Simulink
- Simulation and verification strategies
- Hardware-in-the-loop based rapid design and prototyping
Click below for sections, start dates, locations, instructors,
and to enroll.
Fri. June 27, Redwood City
CHRIS DICK, Ph.D., is the DSP chief scientist at Xilinx, Inc.
- 2 meetings
- June 27 and 28: Fri.-Sat., 9 am-4 pm
- Redwood City: Room 5, Peninsula Center, 1991 Broadway
- $795 (EDP 314427)
Enroll
Textbook(s) for this course:
Please check back for textbook and reader information. For immediate assistance, contact the academic department.